Parameterized SDRAM-based content-addressable memory on field programmable gate array

Contents-addressable memory (CAM) is a special that searches the input data with entire pre-loaded database and generates corresponding address information. CAMs are advancing to be core technology in computer networking systems. As field programmable gate array (FPGA) recently being used for network acceleration applications, demand integrate CAM on FPGA increasing. FPGA-based divided into three categories of implementation: register-based, block RAM (BRAM)-based, distributed RAM-based CAM. However, they come cost excessive resource usage. Besides, collision ratio high CAMs, leading loss failure produce accurate addresses. Synchronous dynamic random-access (SDRAM)-based benefiting from features density low price SDRAM, solve limitations FPGA’s on-chip resources. This paper proposes hardware implementation using modern off-chip SDRAM storage. The architecture customized massive lookup tables resource-saving. Furthermore, parameterized, which better integration. synthesis results comparisons show significant advancement compared other implementations by total reduction RAM. novel shows remarkable improvement depth width capacity 128 Mbyte table.